1. Field of the Invention
The present invention relates to a floating point computation device and, more particularly, to normalization circuitry which can normalize a floating point computation result in such a manner that its mantissa part lies in the range of 1.ltoreq.the mantissa part&lt;2, that is, the mantissa part of the floating point computation result is presented in the form 1.xxx (x is a "don't care" state) (this operation is called normalization), except when the exponent part of the floating point computation result is 0 and the mantissa part of the floating point computation result is therefore presented in the form 0.xxx (x is a "don't care" state) which is less than 1, and the computation result is represented as an unnormalized floating point number (this operation is called unnormalization), and except when the mantissa part of the floating point computation result is 0 and the exponent part of the floating point computation result is therefore set to 0 (this operation is called zero function).
2. Description of the Prior Art
A description will be made as to a method of representing a floating point number with single precision which complies with IEEE standard P754. In the case of single precision which complies with IEEE standard P754, a floating point number is expressed as a 32-bit binary word comprised of a sign bit S, the exponent part E of eight bits, and the mantissa part F of twenty-three bits. A floating point number having single precision which complies with IEEE standard P754 can be classified into either a normalized number or a unnormalized number. When the exponent part is greater than 0 and is less than 255, the floating point number is called "normalized number". The mantissa part of a normalized number satisfies the following relation: 1.ltoreq.the mantissa part&lt;2. Furthermore, since the most significant bit (MSB) of the mantissa part is 1 without exception, only lower-order bits of the mantissa part located below the MSB can be shown in the representation of a normalized number. A normalized number is thus expressed in the following equation: EQU Normalized number=(-1).sup.s .times.(1+F.times.2.sup.-23).times.2.sup.E-127
On the other hand, a floating point number having its exponent part of 0 is called "unnormalized number". Such a unnormalized point number is expressed in the following equation: EQU Unnormalized number=(-1).sup.s .times.(F.times.2.sup.-23).times.2.sup.-126
U.S. Pat. No. 5,103,418 discloses such prior normalization circuitry for use in floating point computation devices. In floating point arithmetic computations, computation results having the zero mantissa part can be generated inevitably. In such a case, it is needed to set the exponent part to zero by using the aforementioned zero function. However, the prior art normalization circuitry as disclosed in U.S. Pat. No. 5,103,418 does not include the zero function. Accordingly, an additional circuit having the zero function has to be incorporated into a floating point computation device equipped with such the prior art normalization circuitry.